HELPNDOC SERIAL SERIAL

Internally the speed is converted to Mbps for determining the delay across the switch. This is speed of the Switch and is in Mhz. No other Architecture, Scheduler or Resource must have this name. This is the name of the ArchitectueSetup block that this switch is associated for the purpose of the Routing Table. Refer the Non-blocking Switch demo model for more details. The following fields are required for the correct operation of this block: A_Command, A_Bytes_Sent, A_Source and A_Destination. if a device such as a Processor or DRAM is connected directly to the Switch Port, then this entry is required in the Routing Table. No routing Table definitions are required for the devices connected to Buses that are directly connected to ports of this bus. This block bypasses the 'Hello Messages' from Architecture components and connects across multiple buses. When switching States, the Channel waits for the Power Cycles before starting the transmission. If there are multiple PHYs, it is the user responsibility to modify the Power levels to accomodate for the multiple parallel data transfers. Currently, this is a very rudimentary power analysis. There is no power computation for each channel. The user can create logic external to the block to change the power state and the power level. When the Channel is idle, it is set to Standby Power State.

When the Channel is transfering data across any channel, the Switch is set to Active Power State.

The A_Command field contains the Command name. If zero delay is required across the switch, the Speed_Mhz must be set to 0.0.

HELPNDOC SERIAL SERIAL

The following delay calculations are done within the Serial Switch block:įor Read or any non-Write Transfer: (Overhead + 32)*(1.0e-6/Speed_Mhz)*(Number_of_PHY)įor Write: (Overhead + (A_Bytes_Sent *8))*(1.0e-6/Speed_Mhz)*(Number_of_PHY)įor Write (Serial Rapid IO): (Overhead + (RIO_Data_Size *8))*(1.0e-6/Speed_Mhz)*(Number_of_PHY) The Overhead cycle is for each transfer and a extra cycle is added for each additional PHY greater than 1. The user can add additional cycles for the Read and Write by entering this in the Overhead_Cycles field. There is a 32-bit address delay for each Read Request and a multi-cycle delay based on the length of the transaction for a Write. If multiple transactions arrive from the same Source with different Channel numbers and to the same destination, they can be transmitted immediately if the channel is available. This has the effect of multiplying the Clock_Speed for the Channel. The Number_of_PHY parameter specifies the number of parallel bits that can be transfered within each Channel.

Multiple channels can be dynamically created during a simulation just by the value in the Channel Field. The transaction is assigned to a channel based on the value in the Field Name containing the channel. There are multiple channels assigned for each Point-to-Point connection. Each Source-Destination combination has a separate queue. This switch transfers requests from each Source (A_Source) to each Destination (A_Destination) in a First Come-First Serve order. You cannot concatenate multiple switches to create a bigger switch. To additional devices beyond 15, the user must add additional ports. In this case, multiple bits can be transfered in parallel for each Channel. This block supports multiple PHYs to be connected to each Channel. Multiple Channels can be defined to each Source-Destination combination. The standard block has 16 Input/Output Device connections.

O The Serial Switch is a serial mesh crossbar switch with a point-to-point connection between each source (A_Source) and destination (A_Destination). Hardware Devices / Switch Block Name : SwitchĬode File Location : VisualSim/actor/lib/bus/Serial_Switch Block Overview

Helpndoc serial